1#ifndef BMUTIL__H__INCLUDED__
2#define BMUTIL__H__INCLUDED__
28#if defined(_M_AMD64) || defined(_M_X64)
30#elif defined(BMSSE2OPT) || defined(BMSSE42OPT)
32#elif defined(BMAVX2OPT)
34#include <avx2intrin.h>
38#pragma GCC diagnostic push
39#pragma GCC diagnostic ignored "-Wconversion"
43#pragma warning( push )
44#pragma warning( disable : 4146)
63#if defined(BMAVX512OPT)
69#if defined(BMSSE2OPT) || defined(BMSSE42OPT)
79 explicit operator __m512i*() {
return &
b_.w512[0]; }
80 explicit operator const __m512i*()
const {
return &
b_.w512[0]; }
83 explicit operator __m256i*() {
return &
b_.w256[0]; }
84 explicit operator const __m256i*()
const {
return &
b_.w256[0]; }
86#if defined(BMSSE2OPT) || defined(BMSSE42OPT)
87 explicit operator __m128i*() {
return &
b_.w128[0]; }
88 explicit operator const __m128i*()
const {
return &
b_.w128[0]; }
103 return v1 < v2 ? v1 : v2;
112 static bool test() {
return true; }
116 static bool test() {
return false; }
128 if (x >= 1<<16) { x = (T)(x >> 16); l |= 16; }
129 if (x >= 1<<8) { x = (T)(x >> 8); l |= 8; }
130 if (x >= 1<<4) { x = (T)(x >> 4); l |= 4; }
131 if (x >= 1<<2) { x = (T)(x >> 2); l |= 2; }
132 if (x >= 1<<1) l |=1;
143 if (x >= 1<<1) l |=1;
173 ((x >= (1U << 24)) ? ((x >= (1 << 28)) ? 28u : 24u) : ((x >= (1U << 20)) ? 20u : 16u))
175 ((x >= (1U << 8)) ? ((x >= (1U << 12)) ? 12u : 8u) : ((x >= (1U << 4)) ? 4u : 0u));
235 asm volatile(
" bsfl %1, %0":
"=r"(r):
"rm"(v) );
243 asm volatile(
" bsrl %1, %0":
"=r"(r):
"rm"(v) );
251#if defined(_M_AMD64) || defined(_M_X64)
254unsigned int bsr_asm32(
unsigned int value)
BMNOEXCEPT
257 _BitScanReverse(&r, value);
262unsigned int bsf_asm32(
unsigned int value)
BMNOEXCEPT
265 _BitScanForward(&r, value);
272unsigned int bsr_asm32(
unsigned int value)
BMNOEXCEPT
278unsigned int bsf_asm32(
unsigned int value)
BMNOEXCEPT
304#if defined(BM_USE_GCC_BUILD)
305 return (
unsigned) (31 - __builtin_clz(value));
307# if defined(BM_x86) && (defined(__GNUG__) || defined(_MSC_VER))
308 return bm::bsr_asm32(value);
310 return bm::ilog2_LUT<unsigned int>(value);
319#if defined(BM_USE_GCC_BUILD)
320 return (
unsigned) __builtin_ctz(value);
322# if defined(BM_x86) && (defined(__GNUG__) || defined(_MSC_VER))
323 return bm::bsf_asm32(value);
334#if defined(BMAVX2OPT) || defined (BMAVX512OPT)
344#if defined(BMAVX2OPT) || defined (BMAVX512OPT)
356#if defined(BMAVX2OPT) || defined (BMAVX512OPT)
357 return (
unsigned)_lzcnt_u64(w);
359 #if defined(BM_USE_GCC_BUILD)
360 return (
unsigned) __builtin_clzll(w);
363 unsigned w1 = unsigned(w >> 32);
385#if defined(BMAVX2OPT) || defined (BMAVX512OPT)
386 return (
unsigned)_tzcnt_u64(w);
388 #if defined(BM_USE_GCC_BUILD)
389 return (
unsigned) __builtin_ctzll(w);
392 unsigned w1 = unsigned(w);
396 w1 = unsigned(w >> 32);
421 #if defined(BM_USE_GCC_BUILD)
422 return (
unsigned) (63 - __builtin_clzll(value));
426 unsigned v = (unsigned)v8;
439#pragma GCC diagnostic pop
442#pragma warning( pop )
Constants, tables and typedefs.
Mini auto-pointer for internal memory management.
ptr_guard(T *p) BMNOEXCEPT
unsigned count_trailing_zeros(unsigned v) BMNOEXCEPT
Portable TZCNT with (uses 37-LUT)
unsigned bit_scan_reverse(T value) BMNOEXCEPT
unsigned count_leading_zeros(unsigned x) BMNOEXCEPT
Portable LZCNT with (uses minimal LUT)
bm::gap_word_t ilog2_LUT< bm::gap_word_t >(bm::gap_word_t x) BMNOEXCEPT
Lookup table based short integer LOG2.
T ilog2(T x) BMNOEXCEPT
Fast loop-less function to find LOG2.
unsigned bit_scan_reverse32(unsigned value) BMNOEXCEPT
unsigned count_leading_zeros_u64(bm::id64_t w) BMNOEXCEPT
64-bit bit-scan reverse
const unsigned set_block_size
unsigned long long int id64_t
T min_value(T v1, T v2) BMNOEXCEPT
Get minimum of 2 values.
BMFORCEINLINE unsigned long long bmi_bslr_u64(unsigned long long w) BMNOEXCEPT
unsigned short gap_word_t
unsigned count_trailing_zeros_u64(bm::id64_t w) BMNOEXCEPT
64-bit bit-scan fwd
T bit_scan_fwd(T v) BMNOEXCEPT
BMFORCEINLINE unsigned long long bmi_blsi_u64(unsigned long long w)
unsigned bit_scan_forward32(unsigned value) BMNOEXCEPT
T ilog2_LUT(T x) BMNOEXCEPT
Lookup table based integer LOG2.
bit-block array wrapped into union for correct interpretation of 32-bit vs 64-bit access vs SIMD
union bm::bit_block_t::bunion_t b_
const bm::word_t * begin() const
const bm::word_t * end() const
ad-hoc conditional expressions
Structure keeps index of first right 1 bit for every byte.
Structure for LZCNT constants (4-bit)
Structure for TZCNT constants.
__m128i BM_VECT_ALIGN w128[bm::set_block_size/4] BM_VECT_ALIGN_ATTR
bm::id64_t BM_VECT_ALIGN w64[bm::set_block_size/2] BM_VECT_ALIGN_ATTR
bm::word_t BM_VECT_ALIGN w32[bm::set_block_size] BM_VECT_ALIGN_ATTR